Compositions and methods for chemical-mechanical polishing (CMP) the surface of a substrate are well known in the art. Polishing compositions (also known as polishing slurries) typically contain an abrasive material in an aqueous carrier. A surface of a substrate is abraded to polish the surface by contacting the surface with a polishing pad and moving the polishing pad relative to the surface while maintaining a CMP slurry between the pad and the surface. Typical abrasive materials include silicon dioxide (silica), cerium oxide (ceria), aluminum oxide (alumina), zirconium oxide (zirconia), and tin oxide. U.S. Pat. No. 5,527,423, for example, describes a method for chemically-mechanically polishing a metal layer by contacting the surface with a polishing slurry comprising high purity fine metal oxide particles in an aqueous medium. Alternatively, the abrasive material may be incorporated into the polishing pad. U.S. Pat. No. 5,489,233 discloses the use of polishing pads having a surface texture or pattern, and U.S. Pat. No. 5,958,794 discloses a fixed abrasive polishing pad.
Conventional polishing systems and polishing methods typically are not entirely satisfactory at planarizing semiconductor wafers. In particular, polishing compositions and polishing pads can have less than desirable polishing rates, and their use in the chemical-mechanical polishing of semiconductor surfaces can result in poor surface quality.
The difficulty in creating an effective polishing system for semiconductor wafers stems from the complexity of the semiconductor wafer. The performance of a given CMP composition generally will vary depending on the composition (e.g., type of metal, type of semiconductor, etc.) of the surface being polished. Semiconductor wafers are typically composed of a substrate, on which a plurality of devices has been formed. Integrated circuits are chemically and physically connected into a substrate by patterning regions in the substrate and layers on the substrate. To produce an operable semiconductor wafer and to maximize the yield, performance, and reliability of the wafer, it is desirable to polish select surfaces of the wafer without adversely affecting underlying structures or topography. In fact, various problems in semiconductor fabrication can occur if the process steps are not performed on wafer surfaces that are adequately planarized. Because the performance of a semiconductor wafer is directly associated with the planarity of its surface, it is crucial to use a polishing composition and method that results in a high polishing efficiency, uniformity, and removal rate and leaves a high quality polish with minimal surface defects.
Various metals and metal alloys have been used to form electrical connections between interconnection levels and devices, including titanium, titanium nitride, aluminum-copper, aluminum-silicon copper, tungsten, platinum, platinum-tungsten, platinum-tin, ruthenium, gold, and combinations thereof. Gold presents a particular challenge in that it is chemically resistant, making it difficult to remove efficiently through chemical-mechanical polishing.
CMP compositions for etching and processing gold surfaces generally include complexing agents that are highly toxic, such as cyanides, compounds that generate toxic materials, such as thiosulfates, which generates hydrogen sulfide, or oxidizers that are intensely colored, such as I2/KI, which can interfere with optical CMP endpoint detectors.
Accordingly, there is an ongoing need for CMP compositions and polishing methods that exhibit desirable planarization efficiency, uniformity, and removal rate during the polishing and planarization of gold-containing substrates without using highly toxic or highly colored oxidizers.
The present invention provides such a composition and method. These and other advantages of the invention, as well as additional inventive features, will be apparent from the description of the invention provided herein.